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[VHDL-FPGA-Verilogdivider

Description: 介绍了除法器的设计,采用verilogHDL语言,利用modelsim仿真验证,压缩包中包含了流程图-Introduced the divider design, using verilogHDL language, the use of ModelSim simulation, compressed package that contains a flow chart
Platform: | Size: 83968 | Author: yaoyongshi | Hits:

[Othertraffic

Description: 实现路口交通灯系统的控制方法很多,可以用标准逻辑器件,可编程控制器PLC,单片机等方案来实现。但是这些控制方法的功能修改及调试都需要硬件电路的支持,在一定程度上增加了功能修改及系统调试的困难。因此,在设计中采用EDA技术,应用目前广泛应用的Verilog HDL硬件电路描述语言,实现交通灯系统控制器的设计,利用MAX+PLUS 集成开发环境进行综合、仿真,并下载到CPLD可编程逻辑器件中,完成系统的控制作用。-Intersection traffic signal systems to achieve the control of many ways you can use standard logic devices, programmable logic controller PLC, microcontroller and other programs to achieve. However, the functions of these control methods require modification and debugging support for hardware circuit, to a certain extent, an increase of functional modifications and system debugging difficulties. Thus, in the design using EDA technologies, applications, the widely used Verilog HDL hardware circuit description language to realize the design of traffic signal system controller, using MAX+ PLUS a comprehensive integrated development environment, simulation, and downloaded to the CPLD programmable logic devices to complete the system control role.
Platform: | Size: 1024 | Author: 沈田 | Hits:

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